Fast Full-Search Block Matching Algorithm Motion Estimation Alternatives in FPGA

Author

Olivares, Joaquín ; Benavides, Ignacio ; Hormigo, Javier ; Villalba, Julio ; Zapata, Emilio

Author_Institution

Dept. of Electrics & Electron., Cordoba Univ.

fYear

2006

fDate

Aug. 2006

Firstpage

1

Lastpage

4

Abstract

Block matching motion estimation takes a great part of the processing time for video encoding. To accelerate this process is must to reach real time video coding. The best motion vector is obtained by full-search block matching algorithm which has to be usually implemented by hardware. In recent years, several FPGA based designs have been proposed since these devices support high number of process elements in parallel mode. In this paper a survey of recent architectures to perform the full-search block matching algorithm in FPGAs is presented. A further comparison on terms of frames per second reached, hardware cost in CLB slices and system frequency is presented

Keywords

field programmable gate arrays; motion estimation; video coding; FPGA; fast full-search block matching algorithm motion estimation; video encoding; Acceleration; Bit rate; Clocks; Computer architecture; Costs; Encoding; Field programmable gate arrays; Hardware; Motion estimation; Systolic arrays;

fLanguage

English

Publisher

ieee

Conference_Titel

Field Programmable Logic and Applications, 2006. FPL '06. International Conference on

Conference_Location

Madrid

Print_ISBN

1-4244-0312-X

Type

conf

DOI

10.1109/FPL.2006.311287

Filename

4101049