A study of electrical character of 3D high-density junction capacitor for SiP

By utilizing the properties of PN junction barrier capacitor, a technology for passive device integration(PDI) on silicon is presented. Accurate high density capacitors, coils, resistors and trough wafer interconnect enable the realization of a highly miniaturized the consumer-oriented connectivity applications module without surface mounted devices (SMDs). The three-dimensional (3D) PN junction structure capacitor increases effective capacitance area, thus enhances capacitance density. With the advantages of high density, low loss, variable capacitance, Electro-Static Discharge (ESD) protection and easy to fabricate, this kind of capacitors can widely take the place of the traditional SMD capacitors and are an excellent candidate for the high-power decoupling, filtering, ESD protection application. Traditional metal-insulator-metal (MIM) capacitor has a major problem that the capacitance will change with the frequency and temperature due to the alterable dielectric constant (e) of the insulator material. It demonstrates that the capacitor can get steady capacitance and low leakage current on the wide range applied bias (V). By etching trench on the surface of the capacitor to form three-dimensional 3D PN junction structure, a high-performance PN junction capacitor based on silicon is achieved in terms of a capacitance density. The electrical characters of the capacitors related to the areas and structures. The capacitors have a high reverse breakdown voltage and a very low reverse leakage current.