DocumentCode
3508760
Title
An FPGA Implementation of Pattern-Selective Pyramidal Image Fusion
Author
Sims, Oliver ; Irvine, James
Author_Institution
Inst. for Syst. Level Integration, Livingston
fYear
2006
fDate
28-30 Aug. 2006
Firstpage
1
Lastpage
4
Abstract
The aim of image fusion is to combine multiple images (from one or more sensors) into a single composite image that retains all useful data without introducing artefacts. Pattern-selective techniques attempt to identify and extract whole features in the source images to use in the composite. These techniques usually rely on multiresolution image representations such as Gaussian pyramids, which are localised in both the spatial and spatial-frequency domains, since they enable identification of features at many scales simultaneously. This paper presents an FPGA implementation of pyramidal decomposition and subsequent fusion of dual video streams. This is the first reported instance of a hardware implementation of pattern-selective pyramidal image fusion. Use of FPGA technology has enabled a design that can fuse dual video streams (greyscale VGA, 30fps) in real-time, and provides approximately 100 times speedup over a 2.8GHz Pentium-4
Keywords
field programmable gate arrays; image fusion; video streaming; FPGA implementation; Gaussian pyramids; hardware implementation; multiresolution image representations; pattern-selective pyramidal image fusion; pattern-selective techniques; Data mining; Feature extraction; Field programmable gate arrays; Image fusion; Image representation; Image resolution; Image sensors; Sensor fusion; Spatial resolution; Streaming media;
fLanguage
English
Publisher
ieee
Conference_Titel
Field Programmable Logic and Applications, 2006. FPL '06. International Conference on
Conference_Location
Madrid
Print_ISBN
1-4244-0312-X
Type
conf
DOI
10.1109/FPL.2006.311296
Filename
4101058
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