Astra: An Advanced Space-Time Reconfigurable Architecture

This paper introduces ASTRA, a novel FPGA-like architecture that can perform operations in space (for maximum performance) or in time (for minimum hardware area) at logic-cell level. Currently, ASTRA is tailored towards DSP applications and supports data flow between nearest neighbor cells. Control signals can be distributed over longer distances using bus-like connections. ASTRA´s (logic and interconnect) silicon area is shown to be quite low while still providing sufficient flexibility for real-life applications. First benchmarking results with traditional applications from DSP domain show that ASTRA is competitive with respect to ASIC in terms of silicon area and power consumption