FPGA Based Imaging Particle Detector Trigger System

An FPGA based trigger system for an imaging particle detector has been designed and produced. The main capabilities of the system are the recognition of the track pattern of the incoming particles, the calculation of its stopping pixel and the time discrimination of events. The description of the implemented algorithms, the FPGA architecture, the developed hardware and the main operation results are included in this paper. The trigger system has already been installed in the FAST detector and operated during the 2005 data taking period with very satisfactory performance. Therefore, this trigger system will be used in the detector for further operation in the incoming years