• DocumentCode
    3510013
  • Title

    An FPGA-Based Dynamically Reconfigurable Platform: From Concept to Realization

  • Author

    Majer, Mateusz

  • Author_Institution
    Dept. of Comput. Sci., Erlangen Nuremberg Univ.
  • fYear
    2006
  • fDate
    28-30 Aug. 2006
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    Dynamically reconfigurable FPGA-based systems offer a new kind of flexibility such as on-demand computing, self-adaption and self-optimization capabilities by restructuring the hardware at run-time. Using partial dynamic reconfiguration allows the main system to run uninterrupted during the reconfiguration process in addition to the reduced time for the reconfiguration process. However, existing FPGA-based platforms are hampered by physical restrictions limiting the practicability of partial reconfiguration. This led us to the concept of the Erlangen slot machine architecture in order to eliminate the physical and technical constraints
  • Keywords
    electronic engineering computing; field programmable gate arrays; reconfigurable architectures; Erlangen slot machine architecture; FPGA systems; dynamic reconfigurable platform; hardware reconstruction; on-demand computing; partial dynamic reconfiguration; reconfiguration process; self-adaption; self-optimization capabilities; Communication switching; Computer science; Field programmable gate arrays; Hardware; Memory management; Pins; Random access memory; Routing; Runtime; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications, 2006. FPL '06. International Conference on
  • Conference_Location
    Madrid
  • Print_ISBN
    1-4244-0312-X
  • Type

    conf

  • DOI
    10.1109/FPL.2006.311364
  • Filename
    4101126