Title :
Precise chip and package 3D capacitance simulations of realistic interconnects using a general purpose FEM-tool
Author_Institution :
Infinion Technol. Corp., Hopewell Junction, NY, USA
Abstract :
This paper describes on- and off-chip 3D capacitance simulations utilizing the ANSYS-MultiphysicsTM general purpose FEM system extended with an APDL macro for capacitance simulations. This facilitates the use of the advanced 3D capabilities of ANSYSTM to generate, edit and visualize realistically shaped 3D structures
Keywords :
capacitance; circuit simulation; finite element analysis; integrated circuit interconnections; integrated circuit modelling; integrated circuit packaging; macros; software tools; 3D structure editing; 3D structure generation; 3D structure visualisation; ANSYS-Multiphysics general purpose FEM system; APDL macro extension; capacitance simulation; chip 3D capacitance simulation; general purpose FEM-tool; interconnects; off-chip 3D capacitance simulation; on-chip 3D capacitance simulation; package 3D capacitance simulation; Boundary conditions; Computational modeling; Conductors; Electrostatics; Integrated circuit interconnections; Maxwell equations; Packaging; Parasitic capacitance; Ultra large scale integration; Visualization;
Conference_Titel :
Electrical Performance of Electronic Packaging, 1999
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-5597-0
DOI :
10.1109/EPEP.1999.819205
