Title :
Near-ideal implanted shallow-junction diode formation by excimer laser annealing
Author :
Gonda, V. ; Burtsev, A. ; Scholtes, T.L.M. ; Nanver, L.K.
Author_Institution :
Delft Univ. of Technol.
Abstract :
Sub-50 nm junction depth p+n and n+p diodes are formed by excimer laser annealing (ELA) of BF2 + and As+ implants, respectively, performed directly in the contact windows. The latter are etched through a stack composed of a reflective Al masking layer deposited on a silicon oxide isolation layer. The etching process, the laser anneal energy and the implantation parameters are optimized for low surface roughness at the silicon surface of the contact with respect to the final junction depth and good edge coverage of the diodes. In this manner near-ideal diode characteristics with ideality factors of 1.06-1.16 and low contact resistances are achieved in the laser energy processing window of 800-1000 mJ/cm2 . Moreover, the uniformity and reproducibility over the wafer is excellent
Keywords :
CMOS integrated circuits; CVD coatings; aluminium; arsenic; boron compounds; contact resistance; etching; ion implantation; laser beam annealing; semiconductor diodes; silicon; silicon compounds; surface roughness; 50 nm; Al-SiO2; As+ implant; BF2 + implant; CMOS; LPCVD TEOS; Si:As; Si:BF2; contact resistance; contact window; edge coverage; etching; excimer laser annealing; ideality factor; implantation parameter; implanted shallow-junction diode; laser anneal energy; n+p diode; p+n diode; reflective Al masking layer; reproducibility; silicon oxide isolation layer; sub-50 nm junction depth; surface isolation; surface roughness; wafer uniformity; Annealing; Diodes; Etching; Implants; Metallization; Optical device fabrication; Rough surfaces; Silicon; Surface emitting lasers; Surface roughness;
Conference_Titel :
Advanced Thermal Processing of Semiconductors, 2005. RTP 2005. 13th IEEE International Conference on
Conference_Location :
Santa Barbara, CA
Print_ISBN :
0-7803-9223-X
DOI :
10.1109/RTP.2005.1613688