DocumentCode :
3511481
Title :
Construction of irregular LDPC codes with low error floors
Author :
Tian, Tao ; Jones, Chris ; Villasenor, John D. ; Wesel, Richard D.
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Volume :
5
fYear :
2003
fDate :
11-15 May 2003
Firstpage :
3125
Abstract :
This work explains the relationship between cycles, stopping sets, and dependent columns of the parity check matrix of low-density parity-check (LDPC) codes. Furthermore, it discusses how these structures limit LDPC code performance under belief propagation decoding. A new metric called extrinsic message degree (EMD) measures cycle connectivity in bipartite graph. Using an easily computed estimate of EMD, we propose a Viterbi-like algorithm that selectively avoids cycles and increases stopping set size. This algorithm yields codes with error floors that are orders of magnitude below those of girth-conditional codes.
Keywords :
Viterbi decoding; error statistics; graph theory; matrix algebra; parity check codes; Viterbi-like algorithm; bipartite graph; cycle connectivity; extrinsic message degree; girth-conditional codes; irregular LDPC codes; low error floors; parity check matrix; parity-check codes; Algorithm design and analysis; Belief propagation; Bipartite graph; Bit error rate; Floors; Hydrogen; Maximum likelihood decoding; Parity check codes; Tree graphs; Turbo codes;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, 2003. ICC '03. IEEE International Conference on
Print_ISBN :
0-7803-7802-4
Type :
conf
DOI :
10.1109/ICC.2003.1203996
Filename :
1203996
Link To Document :
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