• DocumentCode
    351252
  • Title

    Cryptographic processor architectures for DES algorithm

  • Author

    Korkishko, T. ; Melnyk, A.

  • Author_Institution
    Inst. of Comput. Technol., Ternopil, Ukraine
  • Volume
    1
  • fYear
    1999
  • fDate
    1999
  • Firstpage
    175
  • Abstract
    The use of cryptographic processors permits, at the expense of special architectural decisions, essentially to increase the productivity of operations, and to increase the protection level of key information from not permitted access. Cryptographic processor architectures for the DES (data encryption standard) algorithm are considered. The costs of the hardware, the hardware efficiency of use and processor performance are evaluated
  • Keywords
    cryptography; pipeline processing; DES algorithm; costs; cryptographic processor architectures; efficiency; hardware; key information; processor performance; productivity; protection level; Computer architecture; Cryptography; Delay effects; Hardware; Logic; Multiplexing; Productivity; Protection; Registers; Synchronization;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Africon, 1999 IEEE
  • Conference_Location
    Cape Town
  • Print_ISBN
    0-7803-5546-6
  • Type

    conf

  • DOI
    10.1109/AFRCON.1999.820788
  • Filename
    820788
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=351252