DocumentCode :
3512522
Title :
Analysis and modeling of substrate impedance network in RF CMOS
Author :
Bouhana, Emmanuel ; Scheer, Patrick ; Boret, Samuel ; Gloria, Daniel ; Dambrine, Gilles ; Minondo, Michel ; Jaouen, Hervé
Author_Institution :
ST Microelectron., Crolles, France
fYear :
2006
fDate :
6-9 March 2006
Firstpage :
65
Lastpage :
70
Abstract :
This paper presents a new approach for analyzing and modeling the substrate impedance network in RF CMOS. Thanks to preliminary and proper de-embedding of known parasitics, the substrate network is directly identified. Using this approach on MOS transistors from 130 down to 65 nm technologies allows to point out the respective implications of the isolation layer and the surrounding well plug on high-frequency characteristics. Their impacts are studied and a new model is proposed.
Keywords :
CMOS integrated circuits; MOSFET; microwave integrated circuits; semiconductor device models; 130 nm; 65 nm; MOS transistors; RF CMOS; isolation layer; substrate impedance network; CMOS technology; Capacitance; Fingers; Impedance; Intelligent networks; Isolation technology; MOSFET circuits; Plugs; Radio frequency; Semiconductor device modeling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Test Structures, 2006. ICMTS 2006. IEEE International Conference on
Print_ISBN :
1-4244-0167-4
Type :
conf
DOI :
10.1109/ICMTS.2006.1614277
Filename :
1614277
Link To Document :
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