DocumentCode
3512923
Title
The Optimization Implementation of H.264 Video Encoder Based on General DSP
Author
Ma, L. ; Song, J.B.
Author_Institution
Autom. Coll., Beijing Union Univ., Beijing
fYear
2008
fDate
1-3 Nov. 2008
Firstpage
616
Lastpage
620
Abstract
Compared with MPEG-4 and other previous standards, H.264 standard has achieved great break through in coding performance. To meet the requirement of embedded video encoder in various scenarios, an H.264 real-time encoder based on TI TMS320C 6455 is presented in this paper. According to the characteristics of the structure, resources and instruction of the selected DSP, a lot of work have been done at the structure level, the algorithm level and the code level to get a high performance encoder. The experimental results demonstrate that, for the video sequences with 720 times 576 format, the H.264 encoder optimized can achieve the encoding speed of more than 25 frames per second, which can meet the real-time requirements of the applications.
Keywords
digital signal processing chips; optimisation; video coding; H.264 video encoder; TI TMS320C 6455; general DSP; optimization; Automation; Data communication; Digital signal processing; Educational institutions; Intelligent networks; Intelligent systems; MPEG 4 Standard; VLIW; Video sequences; Videoconference; DSP; H.264; Optimization; Video compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Networks and Intelligent Systems, 2008. ICINIS '08. First International Conference on
Conference_Location
Wuhan
Print_ISBN
978-0-7695-3391-9
Electronic_ISBN
978-0-7695-3391-9
Type
conf
DOI
10.1109/ICINIS.2008.144
Filename
4683302
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