DocumentCode
3513057
Title
Design and Optimization of Video Compression System Based on H.264
Author
Yin, Shuxin ; Jiang, Chunlei
Author_Institution
Coll. of Inf. Technol., Heilongjiang Bayi Agric. Univ., Daqing, China
Volume
1
fYear
2010
fDate
11-12 Nov. 2010
Firstpage
376
Lastpage
379
Abstract
This paper introduces a new method of video-compress based on H.264. The coding algorithm adopts 3-D wavelet transformation and Shape Coding. In hardware implement, DSP chips and FPGA chips is adopted, FPGA completes the task of multiply clock periods operate, while DSP chips accomplishes the function of both the single clock period operate and the control of FPGA relocated calculation. Experimental result indicates the design can improve coding efficiency and get a good tradeoff between bit-rate and distortion. The method is shown to be simple, efficient and suitable for hardware implementation.
Keywords
data compression; digital signal processing chips; field programmable gate arrays; video coding; wavelet transforms; 3D wavelet transformation; DSP chips; FPGA chips; H.264; coding algorithm; coding efficiency; shape coding; video compression system optimisation; DSP; DWT; FPGA; H.264; Video Compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Optoelectronics and Image Processing (ICOIP), 2010 International Conference on
Conference_Location
Haiko
Print_ISBN
978-1-4244-8683-0
Type
conf
DOI
10.1109/ICOIP.2010.345
Filename
5663043
Link To Document