Automatic generation of maps of memory accesses for energy-aware memory management

Many signal processing systems are synthesized to execute data-dominated applications. Their behavior is described in a high-level programming language, where the code is typically organized in sequences of loop nests and the main data structures are multidimensional arrays. Since data transfer and storage have a significant impact on both the system performance and the major cost parameters - power consumption and chip area, the designer must spend a significant effort during the system development process on the exploration of the memory subsystem in order to achieve a cost-optimized design. This paper focuses on the reduction of the dynamic energy consumption in the hierarchical memory subsystem of multidimensional signal processing systems, starting from the high-level behavioral specification of the application. The paper presents an algorithm which identifies those parts of arrays from a high-level specification that are intensely accessed (for read and/or write operations), whose storage on-chip yields the highest benefit in terms of dynamic energy consumption. Tested on a two-layer memory hierarchy (scratch-pad and off-chip memories), this algorithm led to significant savings of energy in comparison to previous computation models.