Implementation of a QPSK system on FPGA

Author

Popescu, S.O. ; Gontean, A.S. ; Ianchis, D.

Author_Institution

Appl. Electron. Dept., Politeh. Univ. of Timisoara, Timisoara, Romania

fYear

2011

fDate

8-10 Sept. 2011

Firstpage

365

Lastpage

370

Abstract

The paper presents the design of a QPSK digital communication system and its implementation on FPGAs. The simulations of the system were made in Matlab/Simulink environment and System Generator, a tool used for FPGA designs. The system is made up of two Spartan 3E Starter Kit boards. The first is implemented to comport as a modulator and the second as a demodulator. The VHDL hardware description language was used to design each model. The local clock oscillator on the board operates at 50Mhz and used at 31,250 kHz for the carrier. The operating results were compared with the theorethical ones and were also evaluated by measurements.

Keywords

demodulators; digital communication; field programmable gate arrays; hardware description languages; mathematics computing; oscillators; quadrature phase shift keying; FPGA designs; Matlab-Simulink environment; QPSK digital communication system; VHDL hardware description language; demodulator; frequency 31250 kHz; frequency 50 MHz; local clock oscillator; spartan 3E starter kit boards; system generator; Demodulation; Digital communication; Field programmable gate arrays; Generators; Noise; Phase shift keying;

fLanguage

English

Publisher

ieee

Conference_Titel

Intelligent Systems and Informatics (SISY), 2011 IEEE 9th International Symposium on

Conference_Location

Subotica

Print_ISBN

978-1-4577-1975-2

Type

conf

DOI

10.1109/SISY.2011.6034354

Filename

6034354