• DocumentCode
    3515426
  • Title

    Industrial and technical aspects of chip embedding technology

  • Author

    Ostmann, Andreas ; Manessis, Dionysios ; Stahr, Johannes ; Beesley, Mark ; Cauwe, Maarten ; de Baets, Johan

  • fYear
    2008
  • fDate
    1-4 Sept. 2008
  • Firstpage
    315
  • Lastpage
    320
  • Abstract
    Embedding of semiconductor chips into organic substrates allows a very high degree of miniaturization by stacking multiple layers of embedded components, superior electrical performance by short and geometrically well controlled interconnects as well as a homogeneous mechanical environment of the chips, resulting in good reliability. At PCB manufacturing level, 50 mum thin chips have been embedded with pitches up to 200 mum in up to 18ldquotimes24rdquo panels. Embedding of chips at 100 mum pitch has been achieved at prototype level. Further developments of chip embedding can extend to even finer pitches without redistribution methods only with concurrent developments in ultra fine line patterning, plating methods and chemistries, assembly machines. New manufacturing processes should combine PCB processing and die assembly in one production line in order to benefit the most from this combination without the difficulties of transport between different manufacturing plants. Furthermore, new testing methodologies will be developed and a new supply chain will be created due to incorporation of embedding technologies to PCB production. This paper discusses in detail the technology and manufacturing challenges arisen from the integration of embedding technologies to PCB manufacturing processes.
  • Keywords
    circuit reliability; integrated circuit manufacture; printed circuit manufacture; PCB manufacturing processes; chip embedding technology; die assembly; multiple layer stacking; organic substrates; plating methods; redistribution methods; semiconductor chips embedding; size 100 mum; size 50 mum; ultra fine line patterning; Assembly; Chemistry; Manufacturing processes; Production; Prototypes; Semiconductor device manufacture; Semiconductor device reliability; Stacking; Substrates; Testing; chip embedding; industrialisation of embedding; ultra fine line patterning;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics System-Integration Technology Conference, 2008. ESTC 2008. 2nd
  • Conference_Location
    Greenwich
  • Print_ISBN
    978-1-4244-2813-7
  • Electronic_ISBN
    978-1-4244-2814-4
  • Type

    conf

  • DOI
    10.1109/ESTC.2008.4684368
  • Filename
    4684368