Title :
The effect of offcut angle on electrical conductivity of wafer-bonded n-GaAs/n-GaAs structures for wafer-bonded tandem solar cells
Author :
Yeung, King W. ; Goorsky, Mark S.
Author_Institution :
Dept. of Mater. Sci. & Eng., UCLA, Los Angeles, CA, USA
Abstract :
The effect of offcut angle on the electrical conductivity of III-V multijunction solar devices is investigated using n-GaAs/n-GaAs direct-bonded structures. In the solar industry, misoriented substrates are commonly used in the growth of III-V epitaxial layers. In addition, wafer bonding has been proposed as a potential method of integrating lattice-mismatched materials to avoid the formation of threading dislocations. Our previously published papers showed that sulfur passivation reduces the density of surface charge states and improves the interface conductivity. However, the impact of the offcut angle on the electrical properties has not been explored. n-GaAs wafers miscut towards <;111>; A are chosen and compared to nominal on-axis (001) substrates. The surfaces are treated with either an oxide etch or additional soak in aqueous (NH4)2S. Off-axis wafers are bonded face-to-face in various orientations and then annealed at 400 °C for two hours. It is observed that the electrical conductivity improves considerably with a short rapid thermal processing at 600 °C. However, the out-of-plane relative surface misorientations between the tilted (001) planes greater than 4° exhibit increasingly non-ohmic behavior. A theoretical model that describes the electron tunneling across a grain boundary between semiconductor bicrystals is used to represent the bonded interface and estimate the barrier conduction height. Fitting the zero-bias conductance over a range of temperatures reveals a 0.4 eV increase in barrier height for 12° misoriented sulfur-passivated bonded pairs. Accordingly, the interface resistance at room temperature rises from 0.01 Ω·cm2 to 3.4 Ω·cm2. These results demonstrate that the out-of-plane relative surface misorientation is the critical parameter to be monitored in order to achieve superior electrical conductivity in direct-bonded multijunc- ion solar applications.
Keywords :
III-V semiconductors; electrical conductivity; gallium arsenide; solar cells; (NH4)2S; GaAs-GaAs; III-V epitaxial layers; III-V multijunction solar devices; barrier conduction height; direct-bonded structures; electrical conductivity; electrical properties; electron tunneling; electron volt energy 0.4 eV; grain boundary; interface conductivity; interface resistance; lattice-mismatched materials; nominal on-axis substrates; non-ohmic behavior; offcut angle; out-of-plane relative surface misorientations; oxide etch; semiconductor bicrystals; solar industry; surface charge states; temperature 293 K to 298 K; temperature 400 degC; temperature 600 degC; wafer-bonded tandem solar cells; zero-bias conductance; Bonding; Conductivity; Gallium arsenide; Resistance; Substrates; Surface morphology; Surface treatment; III–V semiconductor materials; photovoltaic cells; substrates; wafer bonding;
Conference_Titel :
Photovoltaic Specialists Conference (PVSC), 2012 38th IEEE
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4673-0064-3
DOI :
10.1109/PVSC.2012.6317767