DocumentCode :
3516090
Title :
General Digit-Serial Normal Basis Multiplier with Distributed Overlap
Author :
Novotný, Martin ; Schmidt, Jan
Author_Institution :
Dept. of Comput. Sci. & Eng., CTU FEE in Prague, Prague, Czech Republic
fYear :
2007
fDate :
29-31 Aug. 2007
Firstpage :
94
Lastpage :
101
Abstract :
We present the architecture of digit-serial normal basis multiplier over GF(2m). The multiplier was derived from the multiplier of Agnew et al. Proposed multiplier is scalable by the digit width of general value in difference of the multiplier of Agnew et al. that may be scaled only by digit width that divides the degree m. This helps designers to trade area for speed e.g. in public-key cryptographic systems based on elliptic-curves, where m should be a prime number. Functionality of multiplier has been tested by simulation and implemented in Xilinx Virtex 4 FPGA.
Keywords :
cryptography; digital arithmetic; field programmable gate arrays; logic testing; multiplying circuits; Xilinx Virtex 4 FPGA; arithmetic operations; digit-serial normal basis multiplier; elliptic-curves; multiplier functionality testing; public-key cryptographic systems; Acceleration; Arithmetic; Computer architecture; Computer science; Elliptic curve cryptography; Galois fields; Polynomials; Public key cryptography; Scalability; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Digital System Design Architectures, Methods and Tools, 2007. DSD 2007. 10th Euromicro Conference on
Conference_Location :
Lubeck
Print_ISBN :
978-0-7695-2978-3
Type :
conf
DOI :
10.1109/DSD.2007.4341455
Filename :
4341455
Link To Document :
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