Title :
A Novel Three-Level Hysteresis Current Regulation Strategy for Three-Phase Three-Level Inverters
Author :
Davoodnezhad, R. ; Holmes, D.G. ; McGrath, Brendan P.
Author_Institution :
Sch. of Electr. & Comput. Eng., RMIT Univ. Melbourne, Melbourne, VIC, Australia
Abstract :
This paper presents a new hysteresis current regulation strategy for the neutral point clamped and flying capacitor (FC) three-level inverters. The strategy uses the measured average of the switched phase leg output voltage to adjust the controller hysteresis band as the load back EMF varies to maintain a near constant phase leg switching frequency. The phase leg switchings are then fine tuned to a fixed frequency clock to further improve frequency regulation. Next, the zero-crossings of the measured phase leg average voltages are used to select between positive and negative switched output voltage levels, so that only one hysteresis current regulator is required for the full inverter switched output voltage range. For the FC inverter, a state machine is then added to select between redundant switching states to maintain balanced capacitor voltages. Finally, the controller is extended to a three-phase system by subtracting the common mode interacting current from the total phase leg current error before making any switching decision. The resulting controller achieves a line-to-line harmonic performance that is very close to open-loop phase disposition pulse width modulation, while retaining all of the dynamic benefits of hysteresis current regulation.
Keywords :
PWM invertors; electric current control; electric potential; finite state machines; frequency control; FC inverter; capacitor voltages; common mode interacting current; controller hysteresis; flying capacitor three-level inverters; frequency regulation; full inverter switched output voltage range; hysteresis current regulation strategy; hysteresis current regulator; line-to-line harmonic performance; load back EMF; near constant phase leg switching frequency; negative switched output voltage levels; neutral point clamped three-level inverters; open-loop phase disposition pulse width modulation; phase leg current error; phase leg switchings; positive switched output voltage levels; redundant switching states; state machine; switched phase leg output voltage; switching decision; three-level hysteresis current regulation strategy; three-phase system; three-phase three-level inverters; zero-crossings; Digital signal processing; Hysteresis; Inverters; Switches; Switching frequency; Voltage control; Voltage measurement; Multilevel hysteresis control; nonlinear current control; three-level hysteresis current regulation; variable band;
Journal_Title :
Power Electronics, IEEE Transactions on
DOI :
10.1109/TPEL.2013.2295597