DocumentCode
351667
Title
Automatic verification of real-time designs
Author
Braberman, Victor A. ; Felder, M.
Author_Institution
Dept. de Comput.- FCEyN, Buenos Aires Univ., Argentina
fYear
1999
fDate
22-22 May 1999
Firstpage
716
Lastpage
717
Abstract
We are working on an automatic approach to verify real-time distributed designs for complex timing requirements which go beyond schedulability. We focus our analysis on designs which adhere to the hypothesis of known analytical theory for fixed-priority scheduling. Unlike previous formal approaches, we profit from that theory and build rather simple and tractable formal models based on Timed Automata. Therefore, we are integrating scheduling analysis techniques into the framework of automatic formal verification.
Keywords
automata theory; distributed processing; formal verification; real-time systems; scheduling; distributed designs; formal verification; real-time designs; scheduling analysis; timing requirements; verification; Automata; Citation analysis; Constraint theory; Delay; Distributed computing; Formal verification; Processor scheduling; Real time systems; Runtime; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Software Engineering, 1999. Proceedings of the 1999 International Conference on
Conference_Location
Los Angeles, CA, USA
ISSN
0270-5257
Print_ISBN
1-58113-074-0
Type
conf
Filename
841099
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