Models and implementations of hardware interface modules in a multi-processor system-on-chip simulator

This paper investigates the modeling of hardware interface modules in cycle accurate simulators. The implemented modules are integrated into a C++ multi-processor system-on-chip (MPSoC) simulator. The implementation of hardware interface models is driven by the following desired features: easy integration into the simulation model of the MPSoC and easy configuration. Regarding the first feature, it is achieved by employing a standardized interface for all modules and by using generic bus models and bus interfaces in order to perform data transfers to and from the modules. The configuration of the modules is achieved by employing a standardized XML configuration file. Four hardware interfaces are presented: DMA controller, LCD interface module, camera interface module, H264 decoder module and the bus traffic generator.