DocumentCode
3516955
Title
Increasing NoC Performance and Utilisation using a Dual Packet Exit Strategy
Author
Millberg, Mikael ; Jantsch, Axel
Author_Institution
R. Inst. of Technol., KTH, Stockholm, Sweden
fYear
2007
fDate
29-31 Aug. 2007
Firstpage
511
Lastpage
518
Abstract
When designing a network the use of buffers is inevitable. Buffers are used at the entry point, inside and at the exits of the network. The usage of these buffers significantly changes the performance of the system as a whole. In order to enhance the buffer utilisation the concept of letting more than one packet exit the network at every switch each clock cycle is introduced - Dual Packet Exit (DPE). The approach is tried on a 4 x 4 and a 6 x 6 mesh. We demonstrate the buffers used in combination with different routing strategies for best effort performance. The result we present shows a 50 % reduction in terms of worst case latency and a 30 % reduction in terms of average latency as well as an increased throughput both from a system and network perspective. We define the term Operational Efficiency as a measure of the network efficiency and show that it increases by roughly 20 % with the DPE technique.
Keywords
buffer circuits; network routing; network-on-chip; buffer storage; dual packet exit; network efficiency; network-on-chip; operational efficiency; Clocks; Costs; Delay; Network-on-a-chip; Routing; Safety; Switches; Telecommunication traffic; Throughput; Traffic control;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital System Design Architectures, Methods and Tools, 2007. DSD 2007. 10th Euromicro Conference on
Conference_Location
Lubeck
Print_ISBN
978-0-7695-2978-3
Type
conf
DOI
10.1109/DSD.2007.4341516
Filename
4341516
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