Title :
CMOS implementation of a pulse-coded neural network with a current controlled oscillator
Author :
Ota, Yasuhiro ; Wilamowski, Bogdan M.
Author_Institution :
Dept. of Electr. Eng., Wyoming Univ., Laramie, WY, USA
Abstract :
This paper presents a compact architecture for CMOS implementation of a pulse-coded neural network with a current controlled oscillator. A computational style described in this paper mimics a biological neural system using pulse-stream signaling and analog summation and multiplication. Synaptic weights are multiplied by employing current mirrors and choosing proper W/L ratios of output transistors of the pulse-coded neuron cell
Keywords :
CMOS analogue integrated circuits; neural chips; oscillators; pulse circuits; CMOS architecture; analog multiplication; analog summation; current controlled oscillator; current mirror; pulse-coded neural network; pulse-stream signaling; synaptic weight; Biological information theory; Biological neural networks; Biology computing; Fires; Frequency; Neural networks; Neurons; Oscillators; Pulse circuits; Threshold voltage;
Conference_Titel :
Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
Conference_Location :
Atlanta, GA
Print_ISBN :
0-7803-3073-0
DOI :
10.1109/ISCAS.1996.541620
