Frequency dependent behavior of a high performance dynamic register file in 1.8 V, 0.25 /spl mu/m SOI technology

Author

Joshi, R.V. ; Hwang, Wei ; Wilson, S.C. ; Shahidi, G. ; Chuang, C.T.

Author_Institution

IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA

fYear

1999

fDate

4-7 Oct. 1999

Firstpage

79

Lastpage

81

Abstract

Summary form only given. High performance register files are essential in fixed or floating point units of a high performance microprocessor. In this paper, the frequency dependent behavior of access time and pulse width of the dynamic register file and the circuit techniques to achieve robust operation in 1.8 V, 0.25 /spl mu/m partially depleted (PD) SOI technology are addressed.

Keywords

circuit simulation; delays; fixed point arithmetic; floating point arithmetic; integrated circuit measurement; integrated circuit modelling; microprocessor chips; shift registers; silicon-on-insulator; 0.25 micron; 1.8 V; PD SOI technology; SOI technology; Si-SiO/sub 2/; access time; circuit techniques; dynamic register file; fixed point units; floating point units; frequency dependent behaviour; high performance dynamic register file; microprocessor; partially depleted SOI technology; pulse width; register files; robust operation; Degradation; Delay effects; Frequency dependence; Hardware; Microelectronics; Pulse measurements; Registers; Space vector pulse width modulation; Timing; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference, 1999. Proceedings. 1999 IEEE International

Conference_Location

Rohnert Park, CA, USA

ISSN

1078-621X

Print_ISBN

0-7803-5456-7

Type

conf

DOI

10.1109/SOI.1999.819862

Filename

819862