• DocumentCode
    3519274
  • Title

    A low cost kerfless thin crystalline Si solar cell technology

  • Author

    Rao, R.A. ; Mathew, L. ; Sarkar, D. ; Smith, S. ; Saha, S. ; Garcia, R. ; Stout, R. ; Gurmu, A. ; Ainom, M. ; Onyegam, E. ; Xu, D. ; Jawarani, D. ; Fossum, J. ; Banerjee, S. ; Das, U. ; Upadhyaya, A. ; Rohatgi, A. ; Wang, Q.

  • Author_Institution
    AstroWatt, Austin, TX, USA
  • fYear
    2012
  • fDate
    3-8 June 2012
  • Abstract
    The crystalline Si photovoltaic industry has been scaling down the Si wafer thickness in order to reduce costs and potentially attain higher efficiencies by minimizing bulk recombination. However, cell manufacturers are struggling to reduce the wafer thickness below 150μm as there are no economically viable technologies for manufacturing very thin Si wafers and such thin silicon wafers impose stringent handling requirements as wafer breakage and yield loss impact final module cost. We have previously reported a novel kerfless exfoliation technology capable of producing ultra thin 25μm thin flexible mono c-Si foils from thick Si wafers. In this work, we report on scaling the technology to 8-inch diameter wafers. A 25μm thin exfoliated monocrystalline Si solar cell with a front heterojunction emitter and a diffused back surface field structure has been fabricated with a power conversion efficiency of 14.9%. Simulations show that with optimized texturing of the foil and better surface passivation, higher efficiencies (20%) can be attained. We have also fabricated dual heterojunction devices on 25μm thin exfoliated Si, which show high Voc of 680mV. Due to the kerfless exfoliation process and wafer reuse, a final cell cost of $0.30/Wp can be achieved.
  • Keywords
    elemental semiconductors; passivation; semiconductor heterojunctions; semiconductor thin films; silicon; solar cells; Si; Si wafer thickness; bulk recombination; cell manufacturers; crystalline Si photovoltaic industry; diffused back surface field structure; dual heterojunction devices; efficiency 14.9 percent; front heterojunction emitter; kerfless exfoliation technology; kerfless thin crystalline Si solar cell technology; size 25 mum; size 8 inch; stringent handling requirements; surface passivation; thin flexible mono c-Si foils; thin silicon wafers; wafer breakage; yield loss impact final module cost; Heterojunctions; Implants; MONOS devices; Metals; Photovoltaic cells; Silicon; Surface treatment; heterojunction; kerfless; photovoltaic cells; silicon; thin crystalline;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Photovoltaic Specialists Conference (PVSC), 2012 38th IEEE
  • Conference_Location
    Austin, TX
  • ISSN
    0160-8371
  • Print_ISBN
    978-1-4673-0064-3
  • Type

    conf

  • DOI
    10.1109/PVSC.2012.6317951
  • Filename
    6317951