Title :
An area-time-efficient residue-to-binary converter
Author :
Wang, Wei ; Swamy, M.N.S. ; Ahmad, M.O.
Author_Institution :
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
Abstract :
In this paper, a new residue-to-binary conversion algorithm, that reduces the size of modulo operation required by the Chinese remainder theorem, is introduced. Based on this algorithm, an efficient residue-to-binary converter is proposed for a general residue number system. The proposed converter achieves a significantly better performance in terms of area, time, and power consumption than existing devices. For the case of the 28-bit dynamic range, the proposed converter is about 20% faster while requiring only 70% of the area, compared to the best existing converter (Srikanthan et al, IEE Proc. Comput. Digit. Tech., vol. 145, no. 3, pp. 229-235, 1998). Also, the power consumption is reduced by 16% in high speed situations and 50% in low voltage situations
Keywords :
CMOS integrated circuits; VLSI; analogue-digital conversion; high-speed integrated circuits; integrated circuit design; low-power electronics; residue number systems; CMOS VLSI technology; Chinese remainder theorem; VLSI implementation; area performance; area-time-efficient residue-to-binary converter; converter area; converter speed; digital signal processing applications; dynamic range; general residue number system; low voltage conditions; modulo operation; power consumption; residue number system; residue-to-binary conversion algorithm; residue-to-binary converter; time performance; Algorithm design and analysis; Arithmetic; Cathode ray tubes; Digital signal processing; Dynamic range; Energy consumption; Low voltage; Signal processing algorithms; Very large scale integration;
Conference_Titel :
Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
Conference_Location :
Lansing, MI
Print_ISBN :
0-7803-6475-9
DOI :
10.1109/MWSCAS.2000.952900
