• DocumentCode
    3520731
  • Title

    Inspection of through silicon vias (TSV) and other interconnections in IC packages by computed tomography

  • Author

    Roth, Holger ; He, Zhenhui ; Mayer, Thomas

  • Author_Institution
    Gen. Electr. Sensing & Inspection Technol. GmbH, Stuttgart, Germany
  • fYear
    2009
  • fDate
    9-11 Dec. 2009
  • Firstpage
    438
  • Lastpage
    441
  • Abstract
    Through silicon vias (TSV) as used in 3D integrated electronic packages were inspected non-destructively by highly resolving nanofocus computed tomography (nanoCT). In particular, in the TSVs plating voids were visualised and quantitatively evaluated by numerical processing of the resulting volumetric data. The nanoCT technology is outlined and further applications such as interposers etc. are considered.
  • Keywords
    integrated circuit packaging; nanotechnology; three-dimensional integrated circuits; tomography; 3D integrated electronic package; IC package; TSV plating void; nanoCT technology; nanofocus computed tomography; through silicon vias; Bonding; Computed tomography; Detectors; Electronics packaging; Inspection; Integrated circuit packaging; Laboratories; Silicon; Through-silicon vias; X-ray imaging;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging Technology Conference, 2009. EPTC '09. 11th
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4244-5099-2
  • Electronic_ISBN
    978-1-4244-5100-5
  • Type

    conf

  • DOI
    10.1109/EPTC.2009.5416506
  • Filename
    5416506
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3520731