INCA: a next-generation architecture for simulation

Author

Lawrence, Jay ; Ussery, Cary

fYear

1996

fDate

26-28 Feb 1996

Firstpage

12

Lastpage

16

Abstract

The paper presents INCA, the Interleaved Native-Compiled code Architecture for simulation. INCA is a flexible strategy to create optimized simulations involving multiple design styles, languages, and scheduling paradigms. INCA emphasizes optimized compilers for HDLs vs. more traditional kernel-based approaches. The critical aspects of the architecture include: the separation of kernel and language, usage of elaboration to construct optimal simulation executables, method-based network evaluation, and techniques for mixing different scheduling approaches

Keywords

circuit analysis computing; hardware description languages; logic CAD; optimising compilers; processor scheduling; software engineering; HDLs; INCA; Interleaved Native-Compiled code Architecture for simulation; elaboration; kernel-based approaches; kernel-language separation; languages; method-based network evaluation; mixed scheduling approaches; multiple design styles; next-generation simulation architecture; optimal simulation executables; optimized compilers; optimized simulations; scheduling paradigm; Accuracy; Application specific integrated circuits; Arithmetic; Design optimization; Discrete event simulation; Hardware design languages; Kernel; Optimizing compilers; Runtime; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Verilog HDL Conference, 1996. Proceedings., 1996 IEEE International

Conference_Location

Santa Clara, CA

ISSN

1085-9403

Print_ISBN

0-8186-7431-8

Type

conf

DOI

10.1109/IVC.1996.496012

Filename

496012