Fastest: a tool for a complete and efficient statistical evaluation of analog circuits

Author

López-Ahumada, R. ; Rodríguez-Macías, R.

Author_Institution

Dept. de Ingenieria Electron., de Sistemas Inf. y Autom., Huelva Univ., Spain

Volume

4

fYear

2000

fDate

2000

Firstpage

113

Abstract

A set of novel techniques are implemented in a CAD tool, FASTEST, which achieves more than one order of magnitude CPU time reduction in typical statistical electrical evaluation of AC and now transient and DC specifications of analog circuits, A description of techniques for DC specifications is presented herein. The tool performance is demonstrated via the analysis of a multiple current mirror. The CPU time is reduced by one order of magnitude with respect to conventional Monte Carlo simulation, while maintaining similar accuracy in the computations

Keywords

analogue integrated circuits; circuit CAD; current mirrors; integrated circuit design; statistical analysis; CAD tool; CPU time reduction; DC specifications; Fastest; analog circuits; multiple current mirror; statistical electrical evaluation; statistical evaluation; Analog circuits; Analytical models; Central Processing Unit; Circuit simulation; Equations; Fluctuations; MOSFETs; Performance analysis; Threshold voltage; Transconductance;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on

Conference_Location

Geneva

Print_ISBN

0-7803-5482-6

Type

conf

DOI

10.1109/ISCAS.2000.858701

Filename

858701