DocumentCode :
3522477
Title :
A sockets-based implementation of hardware and software co-design
Author :
Herbert, Aidan
Author_Institution :
Dept. of Res. & Dev., Credence Syst. Corp., Fremont, CA, USA
fYear :
1996
fDate :
26-28 Feb 1996
Firstpage :
77
Lastpage :
80
Abstract :
The EDA community has provided the tools to automate and accelerate much of the IC design process. However, the development of large ICs still remains expensive and complex. One of the biggest development risks lies in the area of design completeness-that the design will not support all target applications. Design verification tends to be ad hoc, with engineers focusing on verifying the designed functionality with no systematic approach toward verifying all possible applications. This results in partial verification. Design oversights that escape to the IC´s prototype stage add time and cost to the project. Clearly, a benefit will result from integration of the end user into the earliest parts of the design cycle. By enabling end users to explore the design space, a more robust design can be yielded
Keywords :
electronic engineering; electronic engineering computing; formal verification; integrated circuit design; user centred design; user interfaces; EDA community; IC design process; design completeness; design cycle; design verification; designed functionality; hardware/software co design; large ICs; partial verification; robust design; sockets based implementation; user centred design; Acceleration; Application software; Costs; Design engineering; Electronic design automation and methodology; Hardware; Process design; Prototypes; Robustness; Space exploration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Verilog HDL Conference, 1996. Proceedings., 1996 IEEE International
Conference_Location :
Santa Clara, CA
ISSN :
1085-9403
Print_ISBN :
0-8186-7431-8
Type :
conf
DOI :
10.1109/IVC.1996.496021
Filename :
496021
Link To Document :
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