DocumentCode :
3523362
Title :
Asynchronous Cryptographic Hardware Design
Author :
Teifel, John
Author_Institution :
IEEE Sandia Nat. Labs., Albuquerque, NM
fYear :
2006
fDate :
Oct. 2006
Firstpage :
221
Lastpage :
227
Abstract :
Asynchronous integrated circuit technology provides low-power and low-noise operation for portable electronic security applications. Rather than using a global clock, asynchronous circuits employ a system of distributed handshake signals that control on-chip dataflow; reducing power consumption to only those parts of a chip actively involved in computation. Sandia has developed an automated asynchronous design flow that enables the rapid development of these asynchronous ASICs. This paper describes the design of asynchronous DES encryption circuits using this flow, and evaluates their performance against standard synchronous implementations
Keywords :
application specific integrated circuits; asynchronous circuits; cryptography; integrated circuit design; integrated logic circuits; logic design; low-power electronics; asynchronous ASIC; asynchronous DES encryption circuits; asynchronous cryptographic hardware design; asynchronous integrated circuit technology; distributed handshake signals; low-power circuits; on-chip dataflow control; Asynchronous circuits; Automatic control; Clocks; Control systems; Cryptography; Data security; Hardware; Integrated circuit technology; Power system security; System-on-a-chip; DES cryptography; asynchronous logic; low-power circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Carnahan Conferences Security Technology, Proceedings 2006 40th Annual IEEE International
Conference_Location :
Lexington, KY
Print_ISBN :
1-4244-0174-7
Type :
conf
DOI :
10.1109/CCST.2006.313454
Filename :
4105341
Link To Document :
بازگشت