Title :
Optimal allocation of testers to products with a queue time restriction in sort testing
Author_Institution :
Fab/Sort Manuf. Div., Intel Corp., Qiriat-Gat, Israel
Abstract :
The test of each wafer product in Sort (final IC testing) is done by allocating a tester and an appropriate Sort Interface Unit (SIU) to the product, to perform the test programs over the wafer. This allocation problem is a more complex allocation problem in the presence of a queue time restriction. In this paper, this problem is formulated and solved to determine the optimal allocation of testers and SIU´s to wafer products over a planning horizon, such that overall WIP throughout the planning horizon is minimized. The optimal solution also comprehends restrictions on the amount of wafers that may be shipped to other testing sites and replenishment policies regarding new SIU´s.
Keywords :
automatic test equipment; integrated circuit testing; optimisation; queueing theory; sorting; ATE; IC testing; SIU; WIP; automatic test equipment; complex allocation problem; optimal allocation; optimisation; planning horizon; product testing; queue time restriction; sort interface unit; sort testing; test programs; wafer product; Linear programming; Materials; Planning; Resource management; Steady-state; Testing; Time factors; Allocation Problem; Automatic Test Equipment (ATE); Optimization; Queue Time; Throughput;
Conference_Titel :
Robotics and Automation (ICRA), 2013 IEEE International Conference on
Conference_Location :
Karlsruhe
Print_ISBN :
978-1-4673-5641-1
DOI :
10.1109/ICRA.2013.6631077