Title :
Selective harmonic elimination modulation method for multilevel inverters
Author :
Muthuramalingam, A. ; Balaji, M. ; Himavathi, S.
Author_Institution :
EEE Dept., Pondicherry Eng. Coll., Pondicherry
Abstract :
Multilevel converter technology has recently emerged as a very important alternative in the area of high-power applications. Several modulation methods have been applied to multilevel Inverters. The modulation methods with higher switching frequency reduce filter size but increases switching losses. The Step modulation method operates with low switching frequency has less switching losses but it requires large filter size. To reduce the filter size the number of levels of the inverter is increased but it increases the cost of the system. This paper presents a novel modulation method where additional notches are introduced in the multi-level output voltage. These notches eliminate harmonics at the low order/frequency and shifts it a higher order/frequency and hence the filter size is reduced without increasing the switching losses and cost of the system. The proposed modulation method is verified through simulation and such results are also validated practically using a five-level Diode-clamped inverter prototype.
Keywords :
PWM invertors; harmonics suppression; switching convertors; higher switching frequency; multilevel converters; multilevel inverters; selective harmonic elimination modulation method; Costs; Educational institutions; Power electronics; Power harmonic filters; Power system harmonics; Pulse width modulation inverters; Space vector pulse width modulation; Switching frequency; Switching loss; Voltage; Modulation Methods; Multilevel Converter; Multilevel Inverter; OHSW and Selective harmonic elimination;
Conference_Titel :
Power Electronics, 2006. IICPE 2006. India International Conference on
Conference_Location :
Chennai
Print_ISBN :
978-1-4244-3450-3
Electronic_ISBN :
978-1-4244-3451-0
DOI :
10.1109/IICPE.2006.4685338