Title :
Realization of pipelined multiplier-free FIR digital filter
Author_Institution :
Fac. of Eng., Botswana Univ., Gaborone, Botswana
Abstract :
The paper introduces a high-speed multiplication-free realization for FIR filter. The realization is based on the use of a linear periodically time-varying (PTV) system and the use of radix-r recoding schemes for obtaining the filter coefficients. The paper combined and reformulated the Modified Booth multiplication algorithm and the filter operation in bit-level. As a result, two schemes are proposed. The structures can be used to build programmable FIR filter
Keywords :
FIR filters; digital arithmetic; digital filters; encoding; linear phase filters; network synthesis; pipeline processing; bit-level filter operation; filter coefficients; linear periodically time-varying system; linear phase filter; modified Booth multiplication algorithm; pipelined multiplier-free FIR digital filter; programmable FIR filter; radix-r recoding schemes; two´s complement number encoding; Digital filters; Encoding; Finite impulse response filter; Frequency; Gabor filters; Hardware; IIR filters; Nonlinear filters; Stability; Time varying systems;
Conference_Titel :
Africon, 1999 IEEE
Conference_Location :
Cape Town
Print_ISBN :
0-7803-5546-6
DOI :
10.1109/AFRCON.1999.820843
