Title :
Interconnect technology: copper and low-k dielectrics
Author_Institution :
Samsung Electron., Yongin, South Korea
Abstract :
Summary form only given, as follows. The interconnect system in ULSI has drawn greater attention nowadays than ever before. This is because the minimization of RC delay of interconnect has to be satisfied in order to achieve high performance of logic device in the GHz era. The major approach to lower RC delay has been directed toward integration of copper and low-k dielectric materials. In this paper, the current status of copper (barrier, seed, and electroplating) and low-k dielectric technologies and their integration issues are discussed
Keywords :
ULSI; copper; delays; dielectric thin films; high-speed integrated circuits; integrated circuit interconnections; integrated logic circuits; permittivity; Cu; RC delay minimization; ULSI; barrier material; electroplating; integration issues; interconnect technology; logic devices; low-k dielectrics; Biographies; Chemical engineering; Chemical technology; Copper; Delay; Dielectrics; Logic devices; Metallization; Random access memory; Research and development;
Conference_Titel :
VLSI and CAD, 1999. ICVC '99. 6th International Conference on
Conference_Location :
Seoul
Print_ISBN :
0-7803-5727-2
DOI :
10.1109/ICVC.1999.820875