DocumentCode
3529365
Title
Application of low-temperature N2O-annealed oxide and chemical oxide for both boron penetration and gate depletion reductions for thin p+ tungsten polycide gate
Author
Chu, Yun Seok ; Lee, Kwang Pyo ; Lee, Sang Su ; Kim, Sang Chul ; Hong, Byungseop ; Yang, Hong Seon
Author_Institution
Memory R&D Div., Hyundai Electron. Co. Ltd., Ichon, South Korea
fYear
1999
fDate
1999
Firstpage
237
Lastpage
240
Abstract
Boron behavior in p+ W-polycide gate used for high performance surface-channel pMOSFET was investigated. The poly structure and poly-WSix interface play an important role in the characteristics of the MOSFET. It was found that large-grain poly showed severe boron penetration compared to an 800 Å amorphous Si layer. In addition, boron out-diffusion into the WSix layer causes severe gate depletion which gives rise to low saturation current. Application of chemical oxide between poly and tungsten silicide turns out to be good barrier to block fluorine diffusion into the gate oxide as well as boron out-diffusion into the WSix layer. A surface channel pMOSFET using N2O-annealed oxide and chemical oxide shows excellent characteristics of high saturation current, low leakage and gate depletion
Keywords
CMOS integrated circuits; MOSFET; annealing; boron; diffusion barriers; leakage currents; oxidation; semiconductor device metallisation; 800 angstrom; B behavior; B out-diffusion; B penetration; CMOS process; F diffusion blocking; N2O; WSi-Si:B; WSi:B; chemical oxide; gate depletion reduction; large-grain poly; low leakage; low saturation current; low-temperature N2O-annealed oxide; p+ W-polycide gate; poly-WSix interface; surface-channel pMOSFET; Annealing; Boron; CMOS technology; Chemicals; Electrodes; Implants; MOSFET circuits; Silicides; Threshold voltage; Tungsten;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI and CAD, 1999. ICVC '99. 6th International Conference on
Conference_Location
Seoul
Print_ISBN
0-7803-5727-2
Type
conf
DOI
10.1109/ICVC.1999.820891
Filename
820891
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