Title :
7.1 GB/sec bandwidth 3D rendering engine using the EML technology
Author :
Park, Yong-Ha ; Woo, Ramchan ; Han, Sun-Ho ; Kim, Jung-Su ; Lee, Se-Joong ; Kook, Jeong-Hun ; Lim, Jae-Woon ; Hoi-Jun Yoo
Author_Institution :
Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Taejon, South Korea
Abstract :
We implement a rendering engine which has 7.1 GB/s bandwidth and 11.1 Mpolygon/s drawing speed. It has 3D rendering functions such as double buffering, smooth shading, alpha blending and depth comparison. It can convert 3D primitives into complete pixel data in every 90 ns. A serial access memory permits simultaneous memory access both for rendering operation and for screen refresh operation. The proposed virtual page mapping performs rendering operation without a page miss irrespective of the location of a polygon in the screen. Also, the partial word line activation and the sequential block activation can reduce the power consumption of 64 concurrent memory arrays to only 1.2 W
Keywords :
CMOS digital integrated circuits; array signal processing; digital signal processing chips; embedded systems; rendering (computer graphics); 0.35 mum; 1.2 W; 3D primitive conversion; 3D rendering engine; 7.1 GB/s; EML technology; Hyundai CMOS EML process; alpha blending; bandwidth; complete pixel data; concurrent memory arrays; depth comparison; double buffering; drawing speed; embedded memory logic technology; partial word line activation; power consumption; screen refresh operation; sequential block activation; serial access memory; smooth shading; virtual page mapping; Bandwidth; Degradation; Electronics industry; Energy consumption; Engineering drawings; Engines; Image processing; Pixel; Reduced instruction set computing; Rendering (computer graphics);
Conference_Titel :
VLSI and CAD, 1999. ICVC '99. 6th International Conference on
Conference_Location :
Seoul
Print_ISBN :
0-7803-5727-2
DOI :
10.1109/ICVC.1999.820904
