VALID: custom ASIC verification and FPGA education platform

Author

Murphy, Patrick ; Frantz, J. Patrick ; Welsh, Erik ; Hardy, Ricky ; Mohsenin, Tinoosh ; Cavallaro, Joseph

Author_Institution

Rice Univ., Houston, TX, USA

fYear

2003

fDate

1-2 June 2003

Firstpage

64

Lastpage

65

Abstract

This paper describes VALID, a platform for testing student designed ASICs and for teaching the basics of FPGA design. VALID is designed to maximize ease of use from a student´s perspective while maintaining enough flexibility for its use as an FPGA development and instruction platform. This system was designed entirely by students, has been successfully manufactured and is currently being used in a number of courses at Rice.

Keywords

application specific integrated circuits; electronic engineering education; field programmable gate arrays; teaching; testing; FPGA design; FPGA development platform; FPGA education platform; FPGA instruction platform; VALID; application specific integrated circuits; custom ASIC verification; field programmable gate array; student designed system; teaching; Application specific integrated circuits; Education; Field programmable gate arrays; Hardware; Linux; Microprocessors; SDRAM; Sockets; Testing; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Systems Education, 2003. Proceedings. 2003 IEEE International Conference on

Print_ISBN

0-7695-1973-3

Type

conf

DOI

10.1109/MSE.2003.1205257

Filename

1205257