A standard cell library for student projects

Author

Grad, Johannes ; Stine, James E.

Author_Institution

Dept. of Electr. & Comput. Eng., Illinois Inst. of Technol., Chicago, IL, USA

fYear

2003

fDate

1-2 June 2003

Firstpage

98

Lastpage

99

Abstract

A standard-cell library for MOSIS scaleable CMOS rules has been developed. It is intended for use with Synopsys Design Compiler, Cadence Silicon Ensemble, and Cadence Virtuoso or Magic. The library is targeted for the AMI 0.5 μm process, which currently offers the smallest feature size in the MOSIS educational program. The library also includes I/O pad cells and fully places and routes a padframe if desired. All steps in the design flow are fully automated with only three scripts and have been tested successfully in a large VLSI design class at the Illinois Institute of Technology. To customize and run these three scripts, for a given design, typically takes less than five minutes, since all details are transparent to the students, allowing them to focus on the design instead of worrying about the tools.

Keywords

CMOS integrated circuits; VLSI; academic libraries; electronic design automation; engineering education; student experiments; CMOS rule; I/O pad cells; MOSIS educational program; VLSI design; automated design flow; cadence silicon ensemble; complementary metal oxide semiconductor; metal oxide semiconductor implementation service; standard cell library; student projects; synopsys design compiler; very large scale integration; Ambient intelligence; Automatic testing; CMOS technology; Education; Educational programs; Libraries; Pins; Routing; Silicon; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Systems Education, 2003. Proceedings. 2003 IEEE International Conference on

Print_ISBN

0-7695-1973-3

Type

conf

DOI

10.1109/MSE.2003.1205272

Filename

1205272