Author_Institution :
Cadence Design Syst. Inc., Berkeley, CA, USA
Abstract :
Universities are currently updating their VLSI design education offerings to cover the important needs of System-on-Chip (SoC) design. It is important to recognize that SoC is a qualitative shift in design practice: not just more of the same things, for larger and larger designs, but a need to emphasise new topics and a more systematic approach to the design process. SoC is as much or more ´System´ than ´Chip´: thus topics such as embedded software, system-level design, algorithmic design, IP design and IP integration must be added to the curriculum. Verification, and new verification concepts, methods, languages and tools for IP development and integration need a special emphasis. In the new curriculum, design methods, processes and flows become as or more important than basic tool mechanics, and the relationship of standards and technical-business issues which affect SoC, such as IP packaging, qualification, evaluation, acquisition, and exchange are all topics to which students should have a basic exposure.
Keywords :
VLSI; educational courses; industrial property; integrated circuit design; system-on-chip; IP design; IP development; IP integration; IP packaging; SoC design education; VLSI design education; algorithmic design; embedded software; industry expectations; industry needs; intellectual property; qualification; system-level design; system-on-chip design; verification concept; verification languages; verification tools; Algorithm design and analysis; Design methodology; Educational institutions; Embedded software; Packaging; Process design; Software algorithms; System-level design; System-on-a-chip; Very large scale integration;