Electrical Instability of Double-Gate a-IGZO TFTs With Metal Source/Drain Recessed Electrodes

Author

Gwanghyeon Baek ; Linsen Bie ; Abe, Kiyohiko ; Kumomi, Hideya ; Kanicki, J.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Univ. of Michigan, Ann Arbor, MI, USA

Volume

61

Issue

4

fYear

2014

fDate

Apr-14

Firstpage

1109

Lastpage

1115

Abstract

The electrical stability of double-gate (DG) and single-gate (SG) amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO TFTs) with metal source/drain recessed electrodes on glass is investigated and compared. In the device structure of the a-IGZO TFTs, both top gate and bottom gate are defined by lithography, allowing independent or synchronized biasing. Bias temperature stress (BTS) are performed on SG a-IGZO TFTs and DG a-IGZO TFTs with synchronized gate bias condition. Under both positive and negative BTS, synchronized DG a-IGZO TFTs demonstrate much smaller ΔV_TH shift than SG a-IGZO TFTs.

Keywords

amorphous semiconductors; electrodes; gallium compounds; indium compounds; lithography; thin film transistors; zinc compounds; InGaZnO; amorphous indium-gallium-zinc-oxide thin-film transistors; bias temperature stress; bottom gate; double-gate a-IGZO TFTs; electrical instability; lithography; metal source-drain recessed electrodes; single-gate a-IGZO TFTs; top gate; Electrodes; Logic gates; Stress; Synchronization; Temperature measurement; Thin film transistors; Threshold voltage; Amorphous indium–gallium–zinc-oxide (a-IGZO); bias temperature stress (BTS); double gate (DG); single gate (SG); thin-film transistor (TFT);

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2014.2307352

Filename

6767042