A 1.25GHz 0.8W C66x DSP Core in 40nm CMOS

Author

Damodaran, Raguram ; Anderson, Timothy ; Agarwala, Sanjive ; Venkatasubramanian, Rama ; Gill, Michael ; Gopalakrishnan, Dhileep ; Hill, Anthony ; Chachad, Abhijeet ; Balasubramanian, Dheera ; Bhoria, Naveen ; Tran, Jonathan ; Bui, Duc ; Rahman, Mujibur ;

Author_Institution

Texas Instrum. Inc., Dallas, TX, USA

fYear

2012

fDate

7-11 Jan. 2012

Firstpage

286

Lastpage

291

Abstract

The next-generation C66x DSP integrated fixed and floating-point DSP implemented in TSMC 40nm process is presented in this paper. The DSP core runs at 1.25GHz at 0.9V and has a standby power consumption of 800mW. The core transistor count is 21.5 million. The DSP core features 8-way VLIW floating point Data path and a two level memory system and delivers 40 GMACS or 10 GFLOPS floating point MAC performance at 1.25GHz.

Keywords

CMOS integrated circuits; UHF integrated circuits; digital signal processing chips; floating point arithmetic; 8-way VLIW floating point data path; CMOS technology; GFLOPS floating point MAC performance; GMACS; TSMC process; floating-point DSP; frequency 1.25 GHz; integrated fixed DSP; next-generation C66x DSP core; power 0.8 W; size 40 nm; two level memory system; voltage 0.9 V; Arrays; Clocks; Digital signal processing; Microprocessors; Multicore processing; Random access memory; DSP processor; Multicore; VLIW;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design (VLSID), 2012 25th International Conference on

Conference_Location

Hyderabad

ISSN

1063-9667

Print_ISBN

978-1-4673-0438-2

Type

conf

DOI

10.1109/VLSID.2012.85

Filename

6167766