• DocumentCode
    353253
  • Title

    FPGA implementation of a pulse density neural network using simultaneous perturbation

  • Author

    Maeda, Yutaka ; Tada, Toshiki

  • Author_Institution
    Dept. of Electr. Eng., Kansai Univ., Osaka, Japan
  • Volume
    3
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    296
  • Abstract
    We describe a FPGA implementation of a pulse density neural network circuit with learning ability. We adopt the simultaneous perturbation method as a learning rule of the implementation. The learning rule requires only twice forward operations of networks. Thus, without a complicated circuit that calculates gradients of an error function, we implemented the network system with learning ability. We designed a pulse density neural network using VHDL. Based on the design, FPGA system is fabricated. We confirmed simulation results of this implementation through the exclusive OR problem and simple function learning problem
  • Keywords
    field programmable gate arrays; learning (artificial intelligence); neural nets; FPGA implementation; VHDL; exclusive OR problem; learning ability; pulse density neural network; simple function learning problem; simultaneous perturbation; twice forward operations; Circuit simulation; Computational modeling; Field programmable gate arrays; Hardware design languages; Neural networks; Perturbation methods; Pulse circuits; Pulse width modulation; Space vector pulse width modulation; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Neural Networks, 2000. IJCNN 2000, Proceedings of the IEEE-INNS-ENNS International Joint Conference on
  • Conference_Location
    Como
  • ISSN
    1098-7576
  • Print_ISBN
    0-7695-0619-4
  • Type

    conf

  • DOI
    10.1109/IJCNN.2000.861319
  • Filename
    861319