Fault Tolerant Dual Basis Multiplier Over GF (2m)

To fight against fault based side-channel cryptanalysis, a bit-parallel systolic dual basis multiplier using a time redundancy scheme is presented. This scheme is based on the extended dual multiplication to achieve the concurrent error correction (CEC) in the results. Analytical results reveal that our proposed CEC multiplier demands 1.87% space overheads, while the existing multipliers using parity prediction and time/hardware redundancy schemes demand at least 45% space overheads. Moreover, the time overhead of the proposed scheme amounts to only two clock cycles.