DocumentCode :
3532843
Title :
Implementing Symbolic Simulation Using SAT Solvers by Variables Partition
Author :
Yan, Wei ; Wu, Jinzhao
Author_Institution :
Univ. of Electron. Sci. & Technol. of China, Chengdu
fYear :
2009
fDate :
28-29 April 2009
Firstpage :
1
Lastpage :
4
Abstract :
Although parametric representations and reparameterizations are used, the bottleneck of symbolic simulation is still the blowup of BDDs which may grow rapidly with the increase of simulation steps. In this paper, we implement symbolic simulation using SAT solvers with variables partition which reduces the sizes of BDDs and remains enough coverage while lowering backtracks of SAT solvers. This method partitions a big CNF into two smaller subsets A and B, and then divides the variables into three disjoint sets. Through the constraint that the symbolic values are only assigned to the variables which occur in both A and B, the symbolic simulation implemented by SAT solvers obtains both the fewer backtracks and lower memory occupation. This method is proved to be sound and complete.
Keywords :
formal logic; symbol manipulation; SAT solvers; disjoint sets; memory occupation; parametric representations; reparameterizations; symbolic simulation; symbolic values; variables partition; Binary decision diagrams; Boolean functions; Circuit simulation; Circuit synthesis; Computational modeling; Computer simulation; Data structures; Digital circuits; Formal verification; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Testing and Diagnosis, 2009. ICTD 2009. IEEE Circuits and Systems International Conference on
Conference_Location :
Chengdu
Print_ISBN :
978-1-4244-2587-7
Type :
conf
DOI :
10.1109/CAS-ICTD.2009.4960831
Filename :
4960831
Link To Document :
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