An 8-bit, 1mW successive approximation ADC in SOI CMOS

A low-power 8-bit successive approximation Analog to Digital Converter (ADC) was designed and fabricated in a 0.5μm Silicon on Sapphire CMOS technology. The ADC is capable of 32MHz operation, producing 1.23MS/s, consuming 1.5mW at 3.3V supply. It uses an active area of 450×315μm² and 916×790μm² including output pads. The acceptable input swing is 2.1V at 3.3V supply. The ADC is a mixed mode analog-digital circuitry performing algorithmic conversion of an analog input voltage into an 8-bit binary code. The lack of parasitics in the Silicon on Sapphire fabrication process simplifies the design of analog to digital converters. The circuit design is freed from the unaccounted bulk capacitances which generate feedback and corrupt the performance of the ADC at high frequency.