A 10 GIPS SIMD processor for PC-based real time vision applications -architecture, algorithm implementation and language support

Author

Fujita, Yoshihiro ; Kyo, Sholin ; Yamashita, Nobuyuki ; Okazaki, Shin´ichiro

Author_Institution

NEC Corp., Kawasaki, Japan

fYear

1997

fDate

20-22 Oct 1997

Firstpage

22

Lastpage

32

Abstract

This paper describes hardware implementation and software environment of a one-dimensional SIMD processor, IMAP-VISION. IMAP-VISION board is a single-slot PCI-bus board designed for PC-based real-time vision applications. The SIMD processor consists of 256 8-bit linear processor array and has 10.24 GIPS peak performance. In this paper, some detailed algorithm implementations, those which make use of IMAP-VISION special functions; are described, as well as IMAP-VISION architecture, hardware implementation, performance figures and software environment including high-level language 1DC and graphical user interface

Keywords

add-on boards; computer vision; parallel architectures; 10.24 GIPS; IMAP-VISION; PC-based; PCI-bus board; SIMD processor; graphical user interface; hardware implementation; high-level language; real time vision; real-time vision; Bandwidth; Clocks; Graphical user interfaces; Hardware; High level languages; National electric code; Process control; Programming; Real time systems; Registers;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Architecture for Machine Perception, 1997. CAMP 97. Proceedings. 1997 Fourth IEEE International Workshop on

Conference_Location

Cambridge, MA

Print_ISBN

0-8186-7987-5

Type

conf

DOI

10.1109/CAMP.1997.631885

Filename

631885