• DocumentCode
    3534833
  • Title

    Hot-Swapping architecture extension for mitigation of permanent functional unit faults

  • Author

    Rakosi, Zoltan E. ; Hiromoto, Masayuki ; Ochi, Hiroyuki ; Nakamura, Yukihiro

  • Author_Institution
    Dept. of Comm. & Comput. Eng., Kyoto Univ., Kyoto, Japan
  • fYear
    2009
  • fDate
    Aug. 31 2009-Sept. 2 2009
  • Firstpage
    578
  • Lastpage
    581
  • Abstract
    Due to latest advances in semiconductor integration, systems are becoming more susceptible to faults leading to temporary or permanent failures. We propose a new architecture extension suitable for arrays of functional units, that will provide testing and replacement of faulty units, without interrupting normal system operation. The extension relies on data path switching controlled by a hot-swapping algorithm, by use of which functional units are tested and replaced by spares if necessary, ensuring permanent operation while the spares last. The Hot-Swapping functionality could be added as a case study on a sample architecture, with an overhead of 74-87%. Also, a prototype chip (4.2 mm times 2.1 mm) targeted to operate at 166 MHz has been fabricated, using 65 nm process technology.
  • Keywords
    computer architecture; fault tolerant computing; microprocessor chips; nanoelectronics; switching functions; chip process technology; data path switching; frequency 166 MHz; functional unit fault mitigation; hot-swapping architecture; size 2.1 mm; size 4.2 mm; size 65 nm; Circuit faults; Circuit testing; Computer architecture; Degradation; Error correction codes; Manufacturing; Protection; Single event upset; Switches; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications, 2009. FPL 2009. International Conference on
  • Conference_Location
    Prague
  • ISSN
    1946-1488
  • Print_ISBN
    978-1-4244-3892-1
  • Electronic_ISBN
    1946-1488
  • Type

    conf

  • DOI
    10.1109/FPL.2009.5272428
  • Filename
    5272428