Reconfiguration-based time-to-digital converter for Virtex FPGAs

This paper presents a time-to-digital converter based on Virtex FPGA´s reconfiguration and phase shifting capabilities. Concretely, the converter is built around a Digital Clock Manager, and phase shift is the module´s characteristic that is modified through reconfiguration. The proposed conversion method shifts an internally generated clock signal´s phase to precisely determine the position of a target event in the measuring signal. These phase shifts are performed following a process that is similar to successive approximation analog-to-digital conversion. Using the proposed method a resolution of less than 140 ps can be achieved using a Xilinx´s Virtex-4 FPGA. The converter can be implemented in a FPGA without needing any other component, does not require manual placement or routing for implementation, nor does it require an external calibration process. This circuit can be used in any application that demands a precise measurement of a static delay introduced by an external system.