Analysis of power losses of a grid connected PV inverter with Si- and SiC-transistors for generation of reactive power

Due to new grid codes for grid connected photovoltaic power generation, since 2012 PV inverters have to be able to feed in reactive power down to a power factor of cos(φ) = 0.9 besides their normal operation with pure active power [1]. In this paper the influence of different semiconductors on the power losses as function of the power factor will be studied on the base of a three-level MNPC topology. In the first step an analytical method will be found to determine the losses, based on the methods shown in [2], [3] and [4] for full-bridge and NPC topology. Then in the second step the theoretical results will be refined by using a simulation software for power electronics. Finally the power losses from both theoretical methods will be compared to those of a real measurement setup to verify the correctness of these results. Different types of Si-IGBTs and SiC-JFETs are used. Depending on the selected transistors, the power losses increase or decrease with the power factor cos(φ).